1. Field of the Invention
The present invention relates to a method, system, and an article of manufacture for adjusting interrupt levels.
2. Description of the Related Art
A computational device, such as a host system, may include a plurality of interrupt generating agents, such as Input/Output (I/O) controllers. Many I/O controllers are capable of receiving tens or hundreds of thousands of packets (e.g., frames, cells, etc.) per second. I/O controllers, including high-speed I/O controllers (e.g. Gigabit Ethernet MACs), may use interrupts as a method to indicate an I/O event, such as the arrival of a packet. An interrupt service routine associated with a device driver corresponding to the I/O controller may process the I/O events. The processing may include indicating the arrived packet to a protocol stack and the thereby an application that needs the data included in the packet.
Frequent interrupts may reduce the system performance of the computational device. A high rate of interrupt can increase CPU utilization. As a result, the system may become CPU limited and unable to service the received packets. Furthermore, the amount of processing time available to other parts of the protocol stack, operating system, applications, etc., may be reduced. There may be delays in sending acknowledgments or subsequent packets may be dropped. The overall system throughput and reliability of the system may be reduced and livelock may occur. Livelock refers to a state where the processor bandwidth is completely consumed by interrupt processing and other functions are starved.
When the level of interrupts in a system impacts system performance the level of interrupts from interrupt generating agents may have to be adjusted. Prior art techniques include polling, which do not use interrupts, to limit interrupt levels in a system. Prior art I/O controllers may also use a single interrupt to indicate the occurrence of several interrupt events, such as 10 packets being received, to reduce the number of interrupts. However, notwithstanding the earlier techniques for adjusting interrupt levels, there is a need in the art for improved implementations for adjusting interrupt levels.